Integrated switched DC-DC converters (e.g. buck, boost or buck/boost converter) have two main types of power losses. One is due to charging and discharging of the control gate (i.e. the gate capacitance) of the power switches (e.g. power MOSFETs). The control gate typically receives an alternating control voltage that varies between the primary voltage supply level (or a higher voltage level depend on the specific type of converter and its architecture) and ground. The alternating voltage levels on the gate capacitance CG cause an average DC current IDC in the gate driving stage flowing from the primary voltage supply (input voltage VIN) to ground GND. The current IDC can be roughly approximated as:IDC=CG·f·VON  (1)
where f is the switching frequency. The power consumption POWC due to this effect is then:POWC=CG·f·VON2  (2)
It is proportional to the switching frequency, the gate capacitance CG and the square of the voltage level VON for turning the switch on (high level). IDC can reach several mA, which significantly contributes to the overall power consumption of the DC-DC converter.
The second type of power loss is due to the ON resistance of the power switches. This kind of power loss is resistive and referred to as “RDSON loss”. RDSON refers to the resistance of a power switch when a current is flowing through the switch, i.e. when it is turned on. This power loss can be described as:PRES=RDSON·IL2  (3)
where IL is the load current or output current of the DC-DC converter. The first order approximations of the ON resistance RDSON and the control gate capacitance are
                              RDSON          =                                    (                                                                    μ                    ·                    Cox                    ·                                          W                      L                                                        ⁢                                      (                                          Vgs                      -                      Vt                                        )                                                  -                Vds                            )                                      -              1                                      ⁢                                  ⁢        and                            (        4        )                                CG        =                  Cox          ·          W          ·          L                                    (        5        )            
Cox is the gate oxide capacitance per control gate area, μ the mobility of the charge carriers, and W and L the respective width and length of the control gate.
The above equations (2) to (5) show that increasing the dimensions of the power switch (increasing the width W with respect to the length L) may reduce the ON resistance RDSON. Increasing Vgs also decreases the ON resistance RDSON, but this increases POWC as VON is proportional to Vgs. Furthermore, increasing the gate area (W times L) also increases the gate capacitance CG.
This means that a design measure aiming to reduce either of the two power losses POWC or PRES adversely affects the respective other loss.